SM Bus Exerciser and Protocol Analyzer

Product no.: PGY-SM Bus-EX-PD
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SMBus Protocol Exerciser and Analyzer (PGY-SMBus-EX-PD) is the Protocol Analyzer with multiple features to capture and debug communication between the host and the design under test. PGY-SMBus-EX-PD is the leading instrument that enables the design and test engineers to test the respective SMBus designs for their specifications by configuring the PGY-SMBus-EX-PD as Master/Slave, generating SMBus traffic, and decoding the SMBus protocol decode packets.

SMBus (System Management Bus) is one of the known low-speed serial protocols widely used for communication between various components in computer systems such as motherboards, batteries, temperature sensors, power management devices, sideband communication in PCIe, etc.

PGY-SMBus-EX-PD is the leading SMBus Protocol exerciser and analyzer that enables the design and test engineers to test their SMBus designs against SMBus specifications by configuring PGY-SMBus-EX-PD as master/slave, generating SMBus traffic with error injection capability and decoding SMBus Protocol packets.

 

Key features

  • Supports SMBus protocol (version 3.2) and speeds up to 3.4 Mbps.
  • Configure it as Master or Slave. Can work Standalone with internal Master and Slaves (up to 3).
  • Supports all SMBus protocols like Quick Command, Send Byte, Receive Byte, Write Byte / Word, Read Byte/Word, Write 32, Read 32, Write 64, Read 64, Block Write, Block Read, Process Call, Host notify, etc.
  • Support for Address Resolution Protocol (ARP)
  • Ability to generate and receive packets with (or) without PEC (Packet Error Checking) byte.
  • Supports Clock stretching at the slave end.
  • Simultaneously generate SMBus traffic and Protocol decode of the Bus.
  • Ability to configure the bus voltage level from 1V to 3.3V insteps of 50mV.
  • Can define parameters like setup time before repeat start, stop, clock after start, clock to data, etc.
  • Support script to execute the same set of commands multiple times (Loop Feature)
  • Continuous streaming of protocol data to the host computer to provide a large buffer.
  • Timing diagram of Protocol decoded bus.
  • Error Analysis in Protocol Decode
  •  USB 2.0/3.0 host computer interface.
  • ​​API support for automation in Python or C++.
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