EMC Test & Debug - how times have changed

EMC Test & Debug - how times have changed

My first experience of EMC was back in the 90's. At that stage it was a black art as far as I was concerned. The general R&D approach was design it, build it, cross your fingers and take it to an EMC facility for testing.

Amazingly enough, we actually got away with this approach for a good few years! Most products passed first time or required only minor tweaks. Perhaps a better power filter, maybe ferrite chokes on a few cables or improved EMC screening on the case. It's just as well too as that was about the extent of our ability to debug.

The debug and tweaking of the design took place at an external EMC lab. Each tweak needed a 15 to 20 minute scan with an EMC receiver to judge its effectiveness, or more often than not lack of effectiveness. Because the scans took so long you'd wander off to have a coffee and a chat. Half time you'd lose track of what you'd tweaked on the last run. Oh the importance of meticulous record keeping. That could have saved some time.

With the benefit of 20 plus years’ experience and the help of some modern tools, I would now take a very different approach to EMC.

Designing for EMC compliance starts at the product concept stage. A little thought at concept, schematic and PCB layout stages can save you a world of trouble when it finally gets to product testing.

Adding filtering to IO signals costs next to nothing when it's a few passives on a PCB, certainly much less than adding ferrite cores to external cables.

Care and consideration to the routing of high speed signals costs nothing. It's not just the clock signals that should be considered. How about the rise and fall time of your signals? Modern digital devices are capable of very fast rise times. Those fast edges may not be necessary in your particular design. If they can be slowed in your design it may be possible either problematically by reducing drive current, or externally by adding a small series resistor at the output pin. This will dramatically reduce the high frequency harmonic content and make EMC compliance that much easier.

Signal integrity good practice will also greatly improve EMC performance. Solid plane layers, controlled impedance traces, minimal vias on high speed nets etc.

As for the product case or enclosure, I wouldn't even include that in my pre-compliance testing. I'd start with completed PCB's spread out on a desk with all necessary cables and interconnects. If that can pass EMC on its own, the case becomes largely irrelevant. It’s also much less expensive to solve EMC issues on the board than to get in to fully screened enclosures. Thermal management also becomes much easier if you’re not counting on the enclosure to keep your EMI in.

So how will we test our collection of boards? In a large enough company you may have access to a dedicated compliance or pre-compliance lab. You could also go to an external compliance lab, for a significant fee of course. That is certainly a valid option and it is what I did way back in the 90's but it would not be my first choice today. A full compliance lab is designed to give you accurate repeatable results and a high level of certainty. They are not designed for fast scans and intuitive debug.

With the aid of an appropriate spectrum analyzer, some low cost antenna's and a simple near field probe set, you can do your initial pre-compliance testing in the comfort of your own general purpose lab. This makes debugging any issues so much easier as you will have all your tools to hand. It's also so much faster. With the right tools you can do a full 6GHz EMC scan with appropriate CISPR receiver settings, limit lines etc. in around 3 seconds!

Don't worry, I'm sure you'll still find time for coffee, but no more twiddling your thumbs for 20 minutes while waiting for a scan to complete. That has to be a good thing.

To help illustrate this approach, we've created a brief series of videos showing the steps involved...

EMC Testing part 1 of 3 - Antenna Qualification -Determining the Antenna Gain, or Antenna Factors of a low cost log periodic antenna. Ideal for pre-compliance verification work.

EMC Testing part 2 of 3 Pre compliance Validation - Using a calibrated antenna and some background traces to perform pre-compliance validation without the need for an anechoic chamber.

EMC Testing Part 3 of 3 In Depth Debug - Having found the frequency of problem areas with a calibrated antenna setup. We can now use near field probes to narrow in on the specific problem area and hopefully correct any problems at source.

David McKee -Account Manager (test and measurement) at IMEX Systems Ltd.